Dr. B. Vasudeva
Assistant Professor
PhD
JOINING DATE : 31-12-2022
JNTUH ID : 0010-230106-144239

Faculty Personal and Academic Profile

Faculty Department Electronics and Communication Engineering (ECE)
Faculty Name Dr. B. Vasudeva
Professional Email
Personal Email bevaravasudeva@gmail.com
Registration Number 0010-230106-144239
Teaching / Work Experience
I) Present working as a assistant professor in the deprtment of ECE at Malla Reddy Engineering College from 31-12-2023 to till now. II) Industrial Experience - 1 year – (Feb, 2022 – till now),Working as a Project Engineer in Research Centre Imarat (RCI), Hyderabad, Defence Research and Development Organisation, Ministry of Defence, Govt. of India. Designed and verified complex digital blocks using Verilog RTL coding, simulation tools such as ModelSim and prototyping tools like Xilinx ISE or Vivado. Performed verification & validation (V&V) testing of designs through various testbenches before handing over the design for manufacturing purpose. III) Teaching Experience – 2 years – (July, 2018 – February, 2019) – Assistant Professor, Department of Electronics & Communication Engineering, Lendi IET, Vizainagaram, Andhra Pradesh, (June 2017 - July 2018 ) – Assistant Professor, Department of Electronics & Communication Engineering, Satya Institutes of Technical Engineering & Management, Vizianagaram,Andhra Pradesh. IV) Internship Experience - 2 months – (June, 2018 – July, 2018), Research Program on Low Noise Amplifier under the guidance of Dr. Ankur Gupta, IIT Delhi.
Teaching Achievements
Current Designation Assistant Professor
Area of Specialization Image processing using QCA, VLSI, and AI
Joining Date 31-12-2022
Total Experience in this Institution 0 0
Total Experience in other Institutions 0 0
Specialized Skills
Designed and verified complex digital blocks using Verilog RTL coding, simulation tools such as ModelSim and prototyping tools like Xilinx ISE or Vivado. Performed verification & validation (V&V) testing of designs through various testbenches before handing over the design for manufacturing purpose.
UG Qualifications B.E Graduation Year, University
2013,
Andhra University
PG Qualifications M.Tech Graduation Year, University
2016, JNTU kakinada
PhD Qualifications Completed Graduation Year, University
2022, SRM University

Subjects registered in NPTEL

S.No Subject Status (Registered / Completed) Year Month Duration in Weeks
1 The joy of computing using python Registered 2023 Sep 12

Papers published/accepted/submitted in Scopus/WoS/SCI - Journals

S.No Paper Title Name of the Journal Status (Published / Accepted / Submitted) Journal (Scopus / WoS / SCI) Year Month ISSN
1 A new fast and efficient 2-D median filter architecture Springer Published SCI 2019 Oct
2 VLSI implementation of high throughput parallel pipeline median finder for IoT applications Springer Published SCI 2019 Mar
3 RF choke based methodology for flange effect mitigation and antenna isolation improvement in bistatic radars of aerospace vehicles Elsevier Published SCI 2022
4 Design of an efficient QCA-based median filter with energy dissipation analysis Springer Published SCI 2022
5 High performance 2n:1:2n reversible MUX/DMUX architecture for quantum dot cellular automata Wiley Published SCI 2022
6 VLSI Architecture of Decision Based Adaptive Denoising Filter for Removing Salt & Pepper Noise ECS transcation Published SCI 2022
7 High-speed, high-resolution methodology for portable universal radar target-echo simulator Wiley Published SCI 2022

Participation in Seminar / Workshop / Summer School / FDP/ any others

S.No Name of the Programme Title of the Event Organized by (College / University / Industry) Year Month Duration

Organized/Conducted the Seminar / Workshop / Conference / Summer School / FDP or any others.

S.No Name of the Programme Title of the Event Organized by (College / University / Industry) Year Month Duration